Manager, Validation/Verification Engineering in Austin, TX

February 18, 2008

Job Title: Manager, Validation/Verification Engineering
Job Location: Austin, TX
Career Level: Mid (5-10 yrs)
Job Type: Direct
Pay Type: Salary
Maximum Pay: $135,000
Minimum Pay:$125,000
Required Engineering Major/Field: Electrical

Required Skills: 8 yrs digital design exp on FPGA hardware development platforms and a minimum 5 yrs of experience post silicon validation are required. Prior experience managing people, projects and schedules. Experience in audio engineering (analog & Digital) is essential. Microsoft Project, schematic capture design tools, Matlab and Spice highly desired. Must be project schedule driven and meet commitments Excellent problem solving skills, good written and verbal communication and the ability to work across functional groups and organizations are required.

General Job Description: Responsible for managing the team members, projects, equipment and schedules and for enhancing and implementing in-house automated front-end verification and validation test procedures in support of high performance mixed signal analog converters, Class D digital power amplifiers and digital interface products. In addition this position requires individual technical contribution in the design and development of an FPGA to support the next generation of high-speed digital audio networking products from Cirrus Logic. The candidate will provide strong technical leadership in the development and validation of the required FPGA and associated board circuitry

Application Instructions:

Please email resume to shawnda [at] siliconelite [dot] com in Word format.

Contact Name: Shawnda Ewing
Contact Email: shawnda [at] siliconelite [dot] com

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